910GL datasheet(40/426 Pages) INTEL

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Signal Description

Datasheet

Signal Name

Type

Description

SDQS_B[7:0]

I/O

SSTL-

2/1.8

Data Strobes: For DDR the rising and falling edges of SDQS_Bx are

used for capturing data during read and write transactions. For DDR2,

SDQS_Bx and its complement SDQS_Bx# make up a differential strobe

pair. The data is captured at the crossing point of SDQS_Bx and its

complement SDQS_Bx# during read and write transactions.

SDQS_B[7:0]#

I/O

SSTL-1.8

Data Strobe Complements (DDR2 only): These signals are the

complementary DDR2 Strobe signals.

SCKE_B[3:0]

SSTL-

2/1.8

Clock Enable: (1 per Rank) SCKE_B is used to initialize the SDRAMs

during power-up, to power-down SDRAM ranks, and to place all SDRAM

ranks into and out of self-refresh during Suspend-to-RAM.

SODT_B[3:0]

SSTL-1.8

On Die Termination (DDR2 only): Active On-die Termination Control

signals for DDR2 devices.

2.4

DDR/DDR2 DRAM Reference and Compensation

Note that the 82910GL, 82915GL, and 82915PL (G)MCH only supports DDR DRAM.

Signal Name

Type

Description

SRCOMP[1:0]

I/O

System Memory RCOMP

SOCOMP[1:0]

I/O

DDR2 On-Die DRAM Over Current Detection (OCD) driver

compensation (DDR2 only)

SM_SLEWIN[1:0]

Buffer Slew Rate Input: Slew Rate characterization buffer input for X

and Y orientation.

SM_SLEWOUT[1:0]

Buffer Slew Rate Output: Slew Rate characterization buffer output for X

and Y orientation

SMVREF[1:0]

SDRAM Reference Voltage: Reference voltage inputs for each DQ,

DM, DQS, and DQS# input signals.

910GL 数据表(PDF) 40 Page - Intel Corporation

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