910GL datasheet(42/426 Pages) INTEL

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Signal Description

Datasheet

2.6

Analog Display Signals (Intel

82915G/82915GV/82915GL/82910GL GMCH Only)

Signal Name

Type

Description

RED

RED Analog Video Output: This signal is a CRT Analog video output

from the internal color palette DAC. The DAC is designed for a 37.5

Ω

routing impedance; however, the terminating resistor to ground will be

Ω (e.g., 75 Ω resistor on the board, in parallel with a 75 Ω CRT load).

RED#

REDB Analog Output: This signal is an analog video output from the

internal color palette DAC. It should be shorted to the ground plane.

GREEN

GREEN Analog Video Output: This signal is a CRT Analog video

output from the internal color palette DAC. The DAC is designed for a

37.5

Ω routing impedance; however, the terminating resistor to ground

will be 75

Ω (e.g., 75 Ω resistor on the board, in parallel with a 75 Ω CRT

load).

GREEN#

GREENB Analog Output: This signal is an analog video output from the

internal color palette DAC. It should be shorted to the ground plane.

BLUE

BLUE Analog Video Output: This signal is a CRT Analog video output

from the internal color palette DAC. The DAC is designed for a 37.5

Ω

routing impedance; however, the terminating resistor to ground will be

Ω (e.g., 75 Ω resistor on the board, in parallel with a 75 Ω CRT load).

BLUE#

BLUEB Analog Output: This signal is an analog video output from the

internal color palette DAC. It should be shorted to the ground plane.

REFSET

Resistor Set: Set point resistor for the internal color palette DAC.

A 255

Ω 1% resistor is required between REFSET and motherboard

ground.

HSYNC

2.5 V

CMOS

CRT Horizontal Synchronization: This signal is used as the horizontal

sync (polarity is programmable) or “sync interval”. 2.5 V output

VSYNC

2.5 V

CMOS

CRT Vertical Synchronization: This signal is used as the vertical sync

(polarity is programmable). 2.5 V output.

DDC_CLK

I/O

2.5 V

CMOS

Monitor Control Clock. This signal may be used as the DDC_CLK for a

secondary multiplexed digital display connector.

DDC_DATA

I/O

2.5 V

CMOS

Monitor Control Data. This signal may be used as the DDC_Data for a

secondary multiplexed digital display connector.

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