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910GL 数据表(PDF) 45 Page - Intel Corporation |
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910GL 数据表(HTML) 45 Page - Intel Corporation |
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45 / 426 page ![]() Signal Description R Datasheet 45 Signal Name Type Description SDVO_STALL- I PCIE Serial Digital Video Field Stall Complement. This signal is multiplexed with EXP_RXN2. SDVO_STALL+ I PCIE Serial Digital Video Field Stall.. This signal is multiplexed with EXP_RXP2. SDVO_CTRLCLK I/O COD Serial Digital Video Device Control Clock. SDVO_CTRLDATA I/O COD Serial Digital Video Device Control Data. This signal also provides a strapping option. Device 1 (Host-PCI Express Bridge) is disabled on Reset when the SDVO Presence strap (SDVO_CTLRDATA) is sampled high, and is enabled when this signal is sampled low. 2.10 Power and Ground Name Voltage Description VCC 1.5 V Core Power. VTT 1.2 V Processor System Bus Power. VCC_EXP 1.5 V PCI Express* and DMI Power. VCCSM 1.8 V / 2.6 V System Memory Power. DDR2: VCCSM = 1.8 V DDR: VCCSM = 2.6 V VCC2 2.5 V 2.5 V CMOS Power. VCCA_EXPPLL 1.5 V PCI Express PLL Analog Power. VCCA_DPLLA 1.5 V Display PLL A Analog Power. VCCA_DPLLB 1.5 V Display PLL B Analog Power. VCCA_HPLL 1.5 V Host PLL Analog Power. VCCA_SMPLL 1.5 V System Memory PLL Analog Power. VCCA_DAC 2.5 V Display DAC Analog Power. This signal is on the 82915G/82915GV/82915GL/82910GL GMCH only. VSS 0 V Ground. VSSA_DAC 0 V Ground. This signal is on the 82915G/82915GV/82915GL/82910GL GMCH only. |
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