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STA321 数据表(PDF) 67 Page - STMicroelectronics |
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STA321 数据表(HTML) 67 Page - STMicroelectronics |
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67 / 157 page  STA321 Serial audio interface Doc ID 15351 Rev 3 67/157 11.2 Slave mode In this mode BICLKI/O and LRCLKI/O are configured as inputs and supplied by the external peripheral. Figure 43. Timing diagram for slave mode Table 28. Timing parameters for master mode Symbol Parameter Min Typ Max Unit tDL LRCLKI/LRCLKO propagation delay from BICLK active edge 0 - 10 ns tDDA SDATAI propagation delay from BICLKI/O active edge 0 - 15 ns tDST SDATAO setup time to BICLKI/O strobing edge 10 - - ns tDHT SDATAO hold time from BICLKI/O strobing edge 10 - - ns Table 29. Timing parameters for slave mode Symbol Parameter Min Typ Max Unit tBCy BICLK cycle time 50 - - ns tBCH BICLK pulse width high 20 - - ns tBCL BICLK pulse width low 20 - - ns tLRSU LRCLKI/LRCLKO setup time to BICLK strobing edge 10 - - ns tLRH LRCLKI/LRCLKO hold time to BICLK strobing edge 10 - - ns tDS SDATAO setup time to BICLK strobing edge 10 - - ns tDH SDATAO hold time to BICLK strobing edge 10 - - ns tDD SDATAI propagation delay from BICLK active edge 0 - 10 ns BICLKI BICLKO LRCLKI LRCLKO SDATAO SDATAI tBCH tBCL tBCy tDS tLRH tLRSU tDH tDD |
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