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STA321 数据表(PDF) 91 Page - STMicroelectronics |
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STA321 数据表(HTML) 91 Page - STMicroelectronics |
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91 / 157 page ![]() STA321 Register description Doc ID 15351 Rev 3 91/157 PWMO1CFG0 Address: 0x11 Type: RW Reset: 0x20 Description: PWMO1CFG1 Address: 0x12 Type: RW Reset: 0x00 Description: Configuration for PWM-A 7 6 5 4 3210 AZPLS_1 TERNARY_1 HALFB_1 MP_ZERO_1 MIN_PLS_1[3:0] [7] AZPLS_1 1: avoid zero pulse [6] TERNARY_1 1: ternary modulation [5] HALFB_1 1: 1B is modulated as null signal [4] MP_ZERO_1 1: apply the minimum pulse settings also for values near 0 [3:0] MIN_PLS_1[3:0] minimum pulse length = clock period * (MIN_PLS_1 + 1) 765 432 10 PM_1A[1:0] PS_1A[5:0] [7:6] PM_1A[1:0]: PWM mode 00: generate a rising edge using a down carrier 01: generate a falling edge using an up carrier 10: hybrid mode: alternation of modes 00 and 01 11: hybrid mode: alternation of modes 01 and 00 [5:0] PS_1A[5:0]: PWM shift The PWM waveform could be shifted by (PS_1A * clock period / 64) |
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