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STA321 数据表(PDF) 92 Page - STMicroelectronics |
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STA321 数据表(HTML) 92 Page - STMicroelectronics |
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92 / 157 page ![]() Register description STA321 92/157 Doc ID 15351 Rev 3 PWMO1CFG2 Address: 0x13 Type: RW Reset: 0x48 Description: Configuration for PWM-B PWMO2CFG0 Address: 0x14 Type: RW Reset: 0x20 Description: 765 432 10 PM_1B[1:0] PS_1B[5:0] [7:6] PM_1B[1:0]: PWM mode 00: generate a rising edge using a down carrier 01: generate a falling edge using an up carrier 10: ibrid mode: alternation of modes 00 and 01 11: ibrid mode: alternation of modes 01 and 00 [5:0] PS_1B[5:0]: PWM shift The PWM waveform could be shifted by (PS_1B * clock period / 64) 7 6 5 4 3210 AZPLS_2 TERNARY_2 HALFB_2 MP_ZERO_2 MIN_PLS_2[3:0] [7] AZPLS_2 1: avoid zero pulse [6] TERNARY_2 1: ternary modulation [5] HALFB_2 1: 2B is modulated as null signal [4] MP_ZERO_2 1: apply the minimum pulse settings also for values near 0 [3:0] MIN_PLS_2[3:0] Minimum pulse length = clock period * (MIN_PLS_2 + 1) |
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