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STA321 数据表(PDF) 95 Page - STMicroelectronics |
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STA321 数据表(HTML) 95 Page - STMicroelectronics |
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95 / 157 page ![]() STA321 Register description Doc ID 15351 Rev 3 95/157 PWMO3CFG2 Address: 0x19 Type: RW Reset: 0x68 Description: PWMO4CFG0 Address: 0x1A Type: RW Reset: 0x00 Description: 765 432 10 PM_3B[1:0] PS_3B[5:0] [7:6] PM_3B[1:0]: PWM mode 00: generate a rising edge using a down carrier 01: generate a falling edge using an up carrier 10: hybrid mode: alternation of modes 00 and 01 11: hybrid mode: alternation of modes 01 and 00 [5:0] PS_3B[5:0]: PWM shift The PWM waveform could be shifted by (PS_3B * clock period / 64) 7 6 5 4 3210 AZPLS_4 TERNARY_4 HALFB_4 MP_ZERO_4 MIN_PLS_4[3:0] [7] AZPLS_4 1: avoid zero pulse [6] TERNARY_4 1: ternary modulation [5] HALFB_4 1: 4B is modulated as null signal [4] MP_ZERO_4 1: apply the minimum pulse settings also for values near 0 [3:0] MIN_PLS_4[3:0] Minimum pulse length = clock period * (MIN_PLS_4 + 1) |
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