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STA321 数据表(PDF) 83 Page - STMicroelectronics |
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STA321 数据表(HTML) 83 Page - STMicroelectronics |
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83 / 157 page ![]() STA321 Register description Doc ID 15351 Rev 3 83/157 FFXCFG2 Address: 0x02 Type: RW Reset: 0x2D Description: Note: Particular care must be taken when bits NS_ORD and PWM_FREQ are changed. To avoid any audible artifacts, these bits must be modified only with the following procedure: 1. Mute STA321 processing. 2. Change PWM_FREQ and/or NS_ORD and set RESET_NOISH = 1. 3. Configure RESET_NOISH = 0. 4. Unmute STA321 processing. 765432 10 RESET_NOISH PWM_FREQ NS_ORD[1:0] EA_TSFT_ON CB_TSFT_ON EA_PFDIG CB_PFDIG [7] RESET_NOISH 1: a reset is forced to the noise-shaper block [6] PWM_FREQ 0: 4 fS (4*96 kHz = 384 kHz) 1: 8 fS (8*96 kHz = 768 kHz) [5:4] NS_ORD[1:0] Noise shape order 00: 3rd. order 01: 4th. order 10: 5th. order [3] EA_TSFT_ON 1: if there is a fault on the external bridge, it will be put in 3-state [2] CB_TSFT_ON 1: if there is a fault on the CMOS bridge, it will be put in 3-state [1] EA_PFDIG 1: enable the pop-free ramp of EA [0] CB_PFDIG 1: enable the pop-free ramp of CB |
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