BQ28Z560-R1 datasheet(16/60 Pages) TI1

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bq28z560-R1

SLUSBD3 – APRIL 2013

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Charge Overcurrent Detector

If the voltage across both protection MOSFETs (VM – VSS) becomes more negative than the charge overcurrent

detection voltage (VDET4 = –0.112 V typ) for a period up to the charge overcurrent detection delay time (tDET4 =

12 ms typ) due to an abnormal charging current or abnormal charging voltage, the bq28z560-R1 detects the

overcurrent charge state of the battery and the COUT pin transitions to a low level. This prohibits charging the

battery by turning off the external charge control N-channel MOSFET. The bq28z560-R1 releases from the

charge overcurrent detection state on by detecting the connection of a load for a period up to the overcharge

release delay time (tREL4 = 4 ms typ).

Table 2. Hardware Control Due to Fault Detection

Delay

Fault Condition

DOUT

COUT

Comment

(typ)

Once BATHI occurs for longer than the specified duration (1 s typ), the CHG FET is

turned OFF, and bus communication is not valid, the system will support power to the

Overcharge Voltage

OFF

1 s

load with current flow through the CHG FET parasitic diode. This can cause the cell to

Protection

discharge. Once the cell voltage reaches the overcharge release voltage for the

specified duration (8 ms typ) the CHG FET is turned ON and bus communication is valid.

If the cell is being charged with excessive current, the threshold will be based on a

hardware limit measurement of –112 mV typ across the CHG + DSG FET (VM – Vss) for

a duration longer than 12 ms (typ), the CHG FET is turned OFF and bus communication

is not valid. This will prevent further charging of the cell. The setting of the CHG bit in the

Overcurrent

control Status register is dependent on the OC bit setting in the Flags Bit Definition

Protection During

OFF

12 ms

Charging

The FET bit in the Control between the charger is removed and cell voltage falls below

the threshold for greater than 8 ms (typ). COUT is turned back ON. Once the host MCU

takes corrective action OR if the battery charger is removed AND there is a load

detected for a period of 4 ms (typ), the CHG FET is turned ON bus communication is

valid.

If the cell voltage falls to lower than 2.3 V for a duration of 24 ms (typ), the DSG FET is

Over Discharging

turned OFF, and bus communication is not valid. The system requires if the charger is

OFF

24 ms

Voltage Protection

connected and cell voltage rises above threshold for greater than 4 ms (typ). DOUT is

turned back ON and bus communication is valid.

If the cell is being discharged with excessive current, the threshold will be based on a

hardware limit measurement of 150 mV typ across the DSG + CHG FET ( VM – Vss) for

Overcurrent

a duration longer than 12 ms (typ), the DSG FET is turned OFF, and bus communication

Protection During

OFF

12 ms

is not valid. This prevents further discharging of the cell, and the DSG bit in the Control

Discharging

Status register will be set. If the drop across the DSG + CHG FET is less than the

threshold OR there is no load detected for a duration of 4 ms (typ), the DSG FET is

turned ON and bus communication is valid.

Detection of cell short circuit is measured at VM input. Shorted cell detection is VBAT –

0.9 V for greater than 400 µs at VM terminal, and the DSG FET is turned OFF, and bus

Short-Circuit

OFF

400 µs

communication is not valid. The DSG bit in the control Status register will be set. The

Protection

system will turn the DSG FET ON if the voltage at VM is below 150 mV OR no load is

detected.

Gas Gauge Control of Discharge DOUT Pin

Firmware Control of DOUT for Protection

The gas gauge firmware can override the hardware-based protection by forcing DOUT low to turn OFF the

discharge FET. However, the firmware cannot override the hardware protection to force discharge.

The following conditions can enable firmware to force DOUT low:

1. BATLOW—Undervoltage protection using CUV settings. If the cell voltage drops below the firmware setting

the DOUT pin transitions to a low to turn off the discharge FET. The Discharge FET is turned back on once

the cell voltage rises above the set hysteresis.

2. OCD condition—If the average discharge current is greater than the set OCD current, the DOUT pin

transitions low to turn of the Discharge FET. The Discharge FET is turned back on once the average current

decreases below the set level.

3. OTD condition—The DOUT will transition low if the discharge current is flowing and the temperature is above

th set OTD threshold.

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