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BQ28Z560-R1 数据表(PDF) 9 Page - Texas Instruments |
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BQ28Z560-R1 数据表(HTML) 9 Page - Texas Instruments |
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9 / 60 page ![]() t(B) t(BR) t(HW1) t(HW0) t(CYCH) t(DW1) t(DW t(CYCD) Break 7-bit address 8-bit data (a) Break and Break Recovery (c) Host Transmitted Bit (d) Gauge Transmitted Bit (e) Gauge to Host Response 1.2V t(RISE) (b) HDQ line rise time 1-bit R/W t(RSPS) 0) bq28z560-R1 www.ti.com SLUSBD3 – APRIL 2013 ADC (TEMPERATURE AND CELL VOLTAGE) CHARACTERISTICS (continued) TA = –40 to +85ºC, VBAT = 2.7 V to 5.5 V; Typical values stated, where TA = 25ºC and VBAT = 3.6 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Z(ADC1) Effective input resistance (TS) (1) 8 M Ω Effective input resistance (BAT) (1) bq28z560-R1 not measuring cell voltage 8 M Ω Z(ADC2) bq28z560-R1 measuring cell voltage 100 k Ω Ilkg(ADC) Input leakage current (1) 0.3 µA (1) Specified by design. Not production tested. DATA FLASH MEMORY CHARACTERISTICS TA = –40 to +85ºC, VBAT = 2.7 V to 5.5 V; Typical values stated, where TA = 25ºC and VBAT = 3.6 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Data retention (1) 10 Years tDR Flash programming write-cycles (1) 20,000 Cycles tWORDPROG Word programming time (1) 2 ms ICCPROG Flash-write supply current (1) 5 10 mA (1) Specified by design. Not production tested. HDQ COMMUNICATION TIMING CHARACTERISTICS TA = –40 to +85ºC, VBAT = 2.7 V to 5.5 V; Typical values stated, where TA = 25ºC and VBAT = 3.6 V (unless otherwise noted). Capacitance on GPIO is 10 pF unless otherwise specified (1). PARAMETER TEST CONDITIONS MIN TYP MAX UNIT t(CYCH) Cycle time, host to bq28z560-R1 190 μs t(CYCD) Cycle time, bq28z560-R1 to host 190 205 250 μs t(HW1) Host sends 1 to bq28z560-R1 0.5 50 μs t(DW1) bq28z560-R1 sends 1 to host 32 50 μs t(HW0) Host sends 0 to bq28z560-R1 86 145 μs t(DW0) bq28z560-R1 sends 0 to host 80 145 μs Response time, bq28z560-R1 to t(RSPS) 190 950 μs host t(B) Break Time 190 μs t(BR) Break Recovery Time 40 μs HDQ Line Rising Time to Logic 1 t(RISE) 950 ns (1.2 V) (1) Parameters specified by worst-case test program execution in FAST mode. Figure 4. HDQ Timing Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links: bq28z560-R1 |
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