ST7LITE20F2 datasheet(61/166 Pages) STMICROELECTRONICS

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Power saving modes

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interrupt). Refer to Table 12: Interrupt mapping for more details.

Before servicing an interrupt, the CC register is pushed on the stack. The I[1:0] bits of the CC register are

set to the current software priority level of the interrupt routine and recovered when the CC register is

popped.

If the PLL is enabled by option byte, it outputs the clock after an additional delay of tSTARTUP (see

Figure 12: PLL output frequency timing diagram).

9.6.1

AWUF control/status register (CR)

Read/Write

Reset value: 0000 0000 (0Ch)

●

Bits 7:3 = Reserved

●

Bit 2 =

AWUF Auto-Wakeup Flag

This bit is set by hardware when the AWU module generates an interrupt and cleared

by software on reading AWUCSR. Writing to this bit does not change its value.

0: No AWU interrupt occurred

1: AWU interrupt occurred

●

Bit 1=

AWUM Auto-Wakeup Measurement

This bit enables the AWU RC oscillator and connects its output to the input capture of

the 12-bit Auto-Reload timer. This allows the timer to be used to measure the AWU RC

oscillator dispersion and then compensate this dispersion by providing the right value in

the AWUPRE register.

0: Measurement disabled

1: Measurement enabled

●

Bit 0 =

AWUEN Auto Wake Up From Halt Enabled

This bit enables the Auto Wake Up From Halt feature:

once HALT mode is entered, the AWUF wakes up the microcontroller after a time delay

dependent on the AWU prescaler value. It is set and cleared by software.

0: AWUF (Auto Wake Up From Halt) mode disabled

1: AWUF (Auto Wake Up From Halt) mode enabled

000

AWUF

AWUM

AWUEN

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