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ST7LITE20F2 数据表(PDF) 65 Page - STMicroelectronics

部件名 ST7LITE20F2
功能描述  8-bit microcontroller with single voltage Flash memory, data EEPROM, ADC, Timers, SPI
PDF  166 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST7LITE20F2 数据表(HTML) 65 Page - STMicroelectronics

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ST7LITE20F2 ST7LITE25F2 ST7LITE29F2
I/O ports
Doc ID 8349 Rev 5
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10.2.3
Alternate functions
Many ST7s I/Os have one or more alternate functions. These may include output signals
from, or input signals to, on-chip peripherals. The Device Pin Description table describes
which peripheral signals can be input/output to which ports.
A signal coming from an on-chip peripheral can be output on an I/O. To do this, enable the
on-chip peripheral as an output (enable bit in the peripheral’s control register). The
peripheral configures the I/O as an output and takes priority over standard I/O programming.
The I/O’s state is readable by addressing the corresponding I/O data register.
Configuring an I/O as floating enables alternate function input. It is not recommended to
configure an I/O as pull-up as this will increase current consumption.
Before using an I/O as an alternate input, configure it without interrupt. Otherwise spurious
interrupts can occur.
Configure an I/O as input floating for an on-chip peripheral signal which can be input and
output.
Caution:
I/Os which can be configured as both an analog and digital alternate function need special
attention.
The user must control the peripherals so that the signals do not arrive at the same time on
the same pin. If an external clock is used, only the clock alternate function should be
employed on that I/O pin and not the other alternate function.
Figure 31. I/O port general block diagram
DR
DDR
OR
PAD
VDD
Alternate
enable
Alternate
output
1
0
OR SEL
DDR SEL
DR SEL
Pull-up
condition
P-buffer
(see table below)
N-buffer
PULL-UP
(see table below)
1
0
Analog
input
If implemented
Alternate
input
VDD
Diodes
(see table below)
From
other
bits
External
request (eix)
interrupt
Sensitivity
selection
CMOS
Schmitt
trigger
Register
access
bit
From on-chip periphera
l
To on-chip peripheral
.
Combinational
Logic



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