| 数据搜索系统,热门电子元器件搜索 |
|
ST7LITE20F2 数据表(PDF) 49 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
ST7LITE20F2 数据表(HTML) 49 Page - STMicroelectronics |
|
49 / 166 page ![]() ST7LITE20F2 ST7LITE25F2 ST7LITE29F2 Interrupts Doc ID 8349 Rev 5 49/166 External interrupt control register (EICR) Read/Write Reset Value: 0000 0000 (00h) ● Bit 7:6 = IS3[1:0] ei3 sensitivity These bits define the interrupt sensitivity for ei3 (Port B0) according to Table 13: Interrupt sensitivity bits. ● Bit 5:4 = IS2[1:0] ei2 sensitivity These bits define the interrupt sensitivity for ei2 (Port B3) according to Table 13: Interrupt sensitivity bits. ● Bit 3:2 = IS1[1:0] ei1 sensitivity These bits define the interrupt sensitivity for ei1 (Port A7) according to Table 13: Interrupt sensitivity bits. ● Bit 1:0 = IS0[1:0] ei0 sensitivity These bits define the interrupt sensitivity for ei0 (Port A0) according to Table 13: Interrupt sensitivity bits. Note: These 8 bits can be written only when the I bit in the CC register is set. Changing the sensitivity of a particular external interrupt clears this pending interrupt. This can be used to clear unwanted pending interrupts. Refer to Section : External interrupt function. 7 0 IS31 IS30 IS21 IS20 IS11 IS10 IS01 IS00 Table 13. Interrupt sensitivity bits ISx1 ISx0 External interrupt sensitivity 0 0 Falling edge & low level 0 1 Rising edge only 1 0 Falling edge only 1 1 Rising and falling edge |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |