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ST7LITE20F2 数据表(PDF) 67 Page - STMicroelectronics

部件名 ST7LITE20F2
功能描述  8-bit microcontroller with single voltage Flash memory, data EEPROM, ADC, Timers, SPI
PDF  166 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST7LITE20F2 数据表(HTML) 67 Page - STMicroelectronics

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I/O ports
Doc ID 8349 Rev 5
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Analog alternate function
Configure the I/O as floating input to use an ADC input. The analog multiplexer (controlled
by the ADC registers) switches the analog voltage present on the selected pin to the
common analog rail, connected to the ADC input.
Analog recommendations
Do not change the voltage level or loading on any I/O while conversion is in progress. Do not
have clocking pins located close to a selected analog pin.
Warning:
The analog input voltage level must be within the limits
stated in the absolute maximum ratings.
10.3
I/O port implementation
The hardware implementation on each I/O port depends on the settings in the DDR and OR
registers and specific I/O port features such as ADC input or open drain.
Switching these I/O ports from one state to another should be done in a sequence that
prevents unwanted side effects. Recommended safe transitions are illustrated in Figure 32.
Other transitions are potentially risky and should be avoided, since they may present
unwanted side-effects such as spurious interrupt generation.
Open-drain
output(2)
Push-pull
output(3)
1.
When the I/O port is in input configuration and the associated alternate function is enabled as an output,
reading the DR register will read the alternate function output status.
2.
When the I/O port is in output configuration and the associated alternate function is enabled as an input,
the alternate function reads the pin status given by the DR register content.
3.
For true open drain, these elements are not implemented.
Table 23.
I/O configurations (continued)
I/O port
Hardware configuration
NOTE 3
PAD
RPU
Databus
DR
DR register access
R/W
VDD
register
PAD
RPU
Databus
DR
DR register access
R/W
VDD
Alternate
Alternate
Enable
output
register
bit
From on-chip periphera
l
NOTE 3



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