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ST7LITE20F2 数据表(PDF) 90 Page - STMicroelectronics

部件名 ST7LITE20F2
功能描述  8-bit microcontroller with single voltage Flash memory, data EEPROM, ADC, Timers, SPI
PDF  166 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

ST7LITE20F2 数据表(HTML) 90 Page - STMicroelectronics

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On-chip peripherals
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Doc ID 8349 Rev 5
0: Timebase period = tOSC * 8000 (1 ms @ 8 MHz)
1: Timebase period = tOSC * 16000 (2 ms @ 8 MHz)
●
Bit 4 =
TB1IE Timebase interrupt enable
This bit is set and cleared by software.
0: Timebase (TB1) interrupt disabled
1: Timebase (TB1) interrupt enabled
●
Bit 3 =
TB1F Timebase interrupt flag
This bit is set by hardware and cleared by software reading the LTCSR register. Writing
to this bit has no effect.
0: No counter overflow
1: A counter overflow has occurred
●
Bit 2:0 = reserved.
Lite timer input capture register (LTICR)
Read only
Reset Value: 0000 0000 (00h)
●
Bits 7:0 =
ICR[7:0] Input capture value
These bits are read by software and cleared by hardware after a reset. If the ICF bit in
the LTCSR is cleared, the value of the 8-bit up-counter will be captured when a rising or
falling edge occurs on the LTIC pin.
7
0
ICR7
ICR6
ICR5
ICR4
ICR3
ICR2
ICR1
ICR0
Table 39.
Lite timer register map and reset values
Address
(Hex.)
Register
Label
76
54
3
2
1
0
08
LTCSR2
Reset Value
00
00
0
0
TB2IE
0
TB2F
0
09
LTARR
Reset Value
AR7
0
AR6
0
AR5
0
AR4
0
AR3
0
AR2
0
AR1
0
AR0
0
0A
LTCNTR
Reset Value
CNT7
0
CNT6
0
CNT5
0
CNT4
0
CNT3
0
CNT2
0
CNT1
0
CNT0
0
0B
LTCSR1
Reset Value
ICIE
0
ICF
x
TB
0
TB1IE
0
TB1F
0
00
0
0C
LTICR
Reset Value
ICR7
0
ICR6
0
ICR5
0
ICR4
0
ICR3
0
ICR2
0
ICR1
0
ICR0
0



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