STLUX385ATR datasheet(35/99 Pages) STMICROELECTRONICS

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STLUX385A

I/O multifunction signal configuration

MSC_IOMXP1 (Port P1 I/O mux control register)

Port1 I/O multifunction signal configuration register (for functionality description refers to

Section 5.3).

Bit 0:

Sel_p10 Port1[0] I/O multiplexing scheme:

0: Port1[0] is interconnected to GPIO1[0] signal

1: Port1[0] is interconnected to PWM[0] signal

Bit 1:

Sel_p11 Port1[1] I/O multiplexing scheme:

0: Port1[1] is interconnected to GPIO1[1] signal

1: Port1[1] is interconnected to PWM[1] signal

Bit 2:

Sel_p12 Port1[2] I/O multiplexing scheme:

0: Port1[2] is interconnected to GPIO1[2] signal

1: Port1[2] is interconnected to PWM[2] signal

Bit 3:

Sel_p13 Port1[3] I/O multiplexing scheme:

0: Port1[3] is interconnected to GPIO1[3] signal

1: Port1[3] is interconnected to PWM[3] signal

Bit 4:

Sel_p14 Port1[4] I/O multiplexing scheme:

0: Port1[4] is interconnected to GPIO1[4] signal

1: Port1[4] is interconnected to PWM[4] signal

Bit 5:

Sel_p15 Port1[5] I/O multiplexing scheme:

0: Port1[5] is interconnected to GPIO1[5] signal

1: Port1[5] is interconnected to PWM[5] signal

Bit 7-6:

RFU reserved; in order to guarantee future compatibility, the bits are kept or set to 0

during register write operations

Offset: 0x2B

Default value: 0x3F

6543

210

RFU

Sel_p15

Sel_p14

Sel_p13

Sel_p12

Sel_p11

Sel_p10

rr/w

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