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数据搜索系统，热门电子元器件搜索 |
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STLUX385ATR 数据表(PDF) 45 Page - STMicroelectronics |
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STLUX385ATR 数据表(HTML) 45 Page - STMicroelectronics |
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45 / 99 page  DocID024387 Rev 2 45/98 STLUX385A Memory and register map 6.2.11 Universal asynchronous receiver/transmitter (UART) 6.2.12 System timer registers Table 19. UART register map Address Block Register name Register description 0x00.5230 UART UART_SR UART status 0x00.5231 UART_DR UART data 0x00.5232 UART_BRR1 UART baud rate div mantissa [7:0] 0x00.5233 UART_BRR2 UART baud rate div mantissa [11:8] SCIDIV FRACT[3:0] 0x00.5234 UART_CR1 UART control register 1 0x00.5235 UART_CR2 UART control register 2 0x00.5236 UART_CR3 UART control register 3 0x00.5237 UART_CR4 UART control register 4 0x00.5238 UART_CR5 UART control register 5 0x00.5239 UART_GTR UART guard time 0x00.523A UART_PSCR SCI1 prescaler Table 20. System timer register map Address Block Register name Register description 0x00.5340 STMR STMR_CR1 Control register 1 0x00.5341 STMR_IER Interrupt enable 0x00.5342 STMR_SR1 Status register 1 0x00.5343 STMR_EGR Event generation 0x00.5344 STMR_CNTH Counter high 0x00.5345 STMR_CNTL Counter low 0x00.5346 STMR_PSCL Prescaler low 0x00.5347 STMR_ARRH Auto-reload high 0x00.5348 STMR_ARRL Auto-reload low |
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