STLUX385ATR datasheet(47/99 Pages) STMICROELECTRONICS

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DocID024387 Rev 2

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STLUX385A

Memory and register map

6.2.15

State machine event driven (SMEDs)

The SMED<n> address register is:

ADD_REG = (5500h + (40h)*n) + offset

where <n> is the SMED instance number 0-5

Table 22. ADC register map and reset value

Address

Block

0x00.5400

ADC

ADC_CFG

Configuration

0x00.5401

ADC_SOC

Start of conversion

0x00.5402

ADC_IER

Interrupt enable

0x00.5403

ADC_SEQ

Sequencer

0x00.5404

ADC_DATL_0

Low part data 0 converted

0x00.5405

ADC_DATH_0

High part data 0 converted

0x00.5406

ADC_DATL_1

Low part data 1 converted

0x00.5407

ADC_DATH_1

High part data 1 converted

0x00.5408

ADC_DATL_2

Low part data 2 converted

0x00.5409

ADC_DATH_2

High part data 2 converted

0x00.540A

ADC_DATL_3

Low part data 3 converted

0x00.540B

ADC_DATH_3

High part data 3 converted

0x00.540C

ADC_DATL_4

Low part data 4 converted

0x00.540D

ADC_DATH_4

High part data 4 converted

0x00.540E

ADC_DATL_5

Low part data 5 converted

0x00.540F

ADC_DATH_5

High part data 5 converted

0x00.5410

ADC_DATL_6

Low part data 6 converted

0x00.5411

ADC_DATH_6

High part data 6 converted

0x00.5412

ADC_DATL_7

Low part data 7 converted

0x00.5413

ADC_DATH_7

High part data 7 converted

0x00.5414

ADC_SR

Status

0x00.5415

ADC_DLYCNT

SOC delay counter

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