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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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STLUX385ATR 数据表(PDF) 49 Page - STMicroelectronics |
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STLUX385ATR 数据表(HTML) 49 Page - STMicroelectronics |
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49 / 99 page  DocID024387 Rev 2 49/98 STLUX385A Memory and register map 6.2.16 CPU register Note: Register space accessible in debug mode only. 0x1B SMED<n> SMD<n>_CFG Timer configuration register 0x1C SMD<n>_DMP_L Counter dump LSB 0x1D SMD<n>_DMP_H Counter dump MSB 0x1E SMD<n>_GSTS General status 0x1F SMD<n>_IRQ Interrupt request register 0x20 SMD<n>_IER Interrupt enable register 0x21 SMD<n>_ISEL External event control 0x22 SMD<n>_DMP Dump enable 0x23 SMD<n>_FSM_STS FSM core status Table 23. SMED register map (continued) Address (offset) Block Register name Register description Table 24. CPU register map Address Block Register name Register description 0x00.7F00 CPU A Accumulator 0x00.7F01 PCE Program counter extended 0x00.7F02 PCH Program counter high 0x00.7F03 PCL Program counter low 0x00.7F04 XH X-index high 0x00.7F05 XL X-index low 0x00.7F06 YH Y-index high 0x00.7F07 YL Y-index low 0x00.7F08 SPH Stack pointer high 0x00.7F09 SPL Stack pointer low 0x00.7F0A CC Code condition |
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