AM79C978VCSLASHW datasheet(180/261 Pages) AMD

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180

Am79C978

HPR1: HomePNA PHY MII Status

(Register 1)

Table 47.

HPR1: HomePNA PHY MII Status (Register 1)

Bits

Mnemonic

Description

Read/

Write

Default

Hex

Soft

Reset

MII_Status

100BASE-T4

0 = PHY not able to perform 100BASE-T4

100BASE-X Full-Duplex

0 = PHY not able to perform Full-Duplex

100BASE-X

100BASE-X Half-Duplex

0 = PHY not able to perform Half-Duplex

100BASE-X

10 Mbps Full-Duplex

0 = PHY not able to perform 10 Mbps in Full-

Duplex

10 Mbps Half-Duplex

1 = PHY able to perform 10 Mbps in Half-

Duplex

10:7

Reserved

Reads will produce undefined results

MF Preamble Suppression

1 = PHY will accept management frames with

Preamble suppressed

0 = PHY will not accept management frames

with Preamble suppressed

Auto-Negotiation Complete

1 = Auto-Negotiation completed

0 = Auto-Negotiation not completed

Remote Fault

1 = Remote fault detected

0 = Normal operation

Auto-Negotiation Ability

1 = PHY is able to perform Auto-Negotiation

0 = PHY is not able to perform Auto-Negotiation

2Link Status

1 = Link is up

0 = Link is down

This bit will be RESET (latched low and re-

enabled on Read) on the first occurrence of lost

link and will be SET after completion of valid

LINK process.

Jabber Detect

1 = Jabber condition detected

0 = Normal operation

Extended Capability

1 = Extended Register Capability

0 = Basic Register Set Capability

AM79C978VC/W 数据表(PDF) 180 Page - Advanced Micro Devices

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