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AN2014 数据表(PDF) 23 Page - STMicroelectronics |
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AN2014 数据表(HTML) 23 Page - STMicroelectronics |
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23 / 65 page ![]() DocID10701 Rev 10 23/65 AN2014 Hardware considerations 64 4 Hardware considerations EEPROM connections are essential for an application’s robustness. During Power up, Power down and Application Reset, input signals must be fully controlled to avoid hazardous behavior or random operation. For each product family a good hard-wiring design can protect the parts from uncontrolled behavior. 4.1 I2C family (M24xxx devices) 4.1.1 Chip enable (E0, E1, E2) The Chip Enable (E0, E1, E2) inputs have an internal pull-down resistor. It is thus possible to have the three Chip Enable inputs unconnected (Chip Enable address is then decoded as ‘000’). However, this configuration should be avoided since inputs are still prone to antenna- like pick-up or other cross coupling effects. To achieve a robust design, Ei inputs must not be driven dynamically but must be directly tied to VCC or VSS. Figure 16. Chip Enable inputs E0, E1, E2 The input leakage current on the Ei pins depends on the input voltage value (Table 4). |
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