AN2014 datasheet(48/65 Pages) STMICROELECTRONICS

48 / 65 page

Software considerations

AN2014

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DocID10701 Rev 10

least 1 bit in the page address and, if possible, by 1 bit in the column address. See

Table 9. for page and column address bits. The counter is then reset and must also

change address.

In addition, to optimize the number of cycles in the EEPROM and preserve the other data

blocks in the memory array:

•

define data groups or classes (located in the same page) where data with similar

update rates are gathered together. This will optimize the use of the Page mode

instead of the byte mode.

•

the area containing the read-only parameters and the cycled items should be

separated and made independent as much as possible. Two types of data should not

share the same pages and, where possible, not the same columns.

Following the above rules, in laboratory environment, ST EEPROM devices have

demonstrated to reach hundreds of millions of cycles, safely.

5.5.5

Overall number of write cycles

As explained above, each EEPROM cell must not be cycled more than the maximum

cycling value specified in the datasheet. However, the overall number of cycles executed by

the memory can exceed this maximum value as several memory blocks can be cycled

individually.

The safe value of the overall number of cycling is 10 Million cycles for any ST EEPROM.

However, for products identified with process letter K, characterization trials performed on

products equal or larger than 32 Kbit, the safe value of the overall number of cycles at 25°C

is 128M cycles.

AN2014 数据表(PDF) 48 Page - STMicroelectronics