AN2014 datasheet(24/65 Pages) STMICROELECTRONICS

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Hardware considerations

AN2014

24/65

DocID10701 Rev 10

4.1.2

Serial data (SDA)

The Serial Data (SDA) input/output is a bidirectional signal. The SDA pin is internally

connected to a CMOS Schmitt trigger input buffer and an open drain output transistor (see

Figure 17.). The SDA line must be pulled to the VCC of the device through a pull-up resistor

(RBUS). The value of the pull-up resistor depends on the capacitive load of SDA line, Master

and EEPROM I/O buffer characteristics. See Table 5 for calculation rules.

The input pin leakage is negligible (typically a few nA). The input schematic (including

protection circuit) does not offer any open path to the VSS or VCC therefore the SDA level

can be set before the EEPROM power up and remain high even after Power Down with no

risk of leakage or EOS.

Table 4. Connecting the Ei inputs of I²C products

I²C products

1 Kbits to 16 Kbits 32 Kbits to 128 Kbits 256 Kbits to 2 Mbits

Internal E0, E1, E2 pull-down

resistance (RPD) typical value

(devices identified with the K

and T process letters)

Internal E0, E1, E2 pull-down

resistance (RPD) typical value

(all other previous devices)

50 k

30 k

50 k

100 k

50 k

Input leakage Ili of Ei pins

Ili = 0 for VEi > VIH

Ili = VEi/RPD for 0 < VEi < VIH

Recommended connection

of Ei pins

Direct connection to VCC or VSS

Table 5. Calculation rules for pull-up resistor on SDA(1)

1. The smaller RBUS, the faster the clock frequency. The higher RBUS, the lower the operating current, the

slower the transitions and the lower the electromagnetic interference.

Maximum RBUS

RBUS defines the SDA line rise time tR (defined in the M24xxx

datasheets), depending on the CBUS parasitic value (2)

2. Refer to the Maximum RBUS value versus bus parasitic capacitance (CBUS) for an I2C bus at maximum

frequency figure in the I2C datasheet.

Minimum RBUS

Maximum value of:

{(VCC - VIL EEPROM)/IOL Master or (VCC - VIL Master)/IOL EEPROM}

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