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TAS2553 数据表(PDF) 39 Page - Texas Instruments

部件名 TAS2553
功能描述  TAS2553 2.8-W Class-D Mono Audio Amplifier with Class-G Boost and Speaker Sense
PDF  58 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

TAS2553 数据表(HTML) 39 Page - Texas Instruments

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TAS2553
www.ti.com
SLAS978B – SEPTEMBER 2013 – REVISED FEBRUARY 2014
7.5.19 Register 0x11: PDM Configuration Register
Sets the PDM clock source and whether channel 1 data is transmitted on the rising or falling edge of the clock.
Channel 2 transmits on the opposite edge.
READ /
BIT
NAME
DEFAULT
DESCRIPTION
WRITE
7-3
R/W
0 0000
Reserved. Write only default values.
2
PDM_DATA_ES
R/W
0
PDM Data Edge Select
0 = falling edge
1 = rising edge
1-0
PDM_CLK_SEL
R/W
01
PDM Clock Select
00 = PLL / 8
01 = IVCLKIN
10 = BCLK
11 = MCLK
7.5.20 Register 0x12: PGA Gain Register
READ /
BIT
NAME
DEFAULT
DESCRIPTION
WRITE
7-5
R/W
000
Reserved. Write only default values.
4-0
PGA_GAIN
R/W
0 0000
PGA Gain Value
00000 = -7 dB
00001 = -6 dB
…
11110 = +23 dB
11111 = +24 dB
7.5.21 Register 0x13: Class-D Edge Rate Control Register
READ /
BIT
NAME
DEFAULT
DESCRIPTION
WRITE
7
GAINCOMP_EN
R/W
0
I-V Sense Gain Compensation Control
Enables AGC compensation for current sense feedback. AGC
compensation increases the gain of the current sense data by the same
gain the AGC instantaneously attenuates.
0 = No I-V sense gain compensation
1 = Gain compensation enabled
6-4
ERC_SEL
R/W
100
Class-D Output Edge Rate Control
000 = 50 ns
001 = 40 ns
010 = 29 ns
011 = 25 ns
100 = 14 ns (default)
101 = 13 ns
110 = 12 ns
111 = 11 ns
3-0
R/W
0000
Reserved. Write only default values.
Copyright © 2013–2014, Texas Instruments Incorporated
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39
Product Folder Links: TAS2553



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