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TAS2553 数据表(PDF) 24 Page - Texas Instruments |
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TAS2553 数据表(HTML) 24 Page - Texas Instruments |
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24 / 58 page ![]() t h(WS) WCLK BCLK DOUT DIN t L(BCLK) t H(BCLK) t s(WS) t d(DO-WS) t d(DO-BCLK) t h(DI) t s(DI) TAS2553 SLAS978B – SEPTEMBER 2013 – REVISED FEBRUARY 2014 www.ti.com Figure 38. I2S/LJF/RJF Timing in Slave Mode Table 6. I2S/LJF/RJF Timing in Slave Mode (see Figure 38) IOVDD=1.8V IOVDD=3.3V PARAMETER UNIT MIN MAX MIN MAX tH(BCLK) BCLK high period 35 35 ns tL(BCLK) BCLK low period 35 35 ns ts(WS) (WS) 8 8 ns th(WS) WCLK hold 8 8 ns td(DO-WS) WCLK to DOUT delay (For LJF Mode only) 50 25 ns td(DO-BCLK) BCLK to DOUT delay 50 25 ns ts(DI) DIN setup 8 8 ns th(DI) DIN hold 8 8 ns tr Rise time 4 4 ns tf Fall time 4 4 ns 24 Submit Documentation Feedback Copyright © 2013–2014, Texas Instruments Incorporated Product Folder Links: TAS2553 |
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