TAS2553_15 datasheet(21/58 Pages) TI

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LD(n)

LD(n+1)

WORD

CLOCK

BIT

CLOCK

DATA

N N N

RD(n)

LEFT CHANNEL

RIGHT CHANNEL

LD(n)=n'thsampleofleftchanneldata

RD(n)=n'thsampleofrightchanneldata

LD(n)

LD(n+1)

WORD

CLOCK

BIT

CLOCK

DATA

N N N

RD(n)

LEFT CHANNEL

RIGHT CHANNEL

LD(n)=n'thsampleofleftchanneldata

RD(n)=n'thsampleofrightchanneldata

BCLK

WCLK

DIN/

DOUT

n-1 n-2

LSB

MSB

LeftChannel

RightChannel

n-3

LSB

MSB

1/fs

TAS2553

www.ti.com

SLAS978B – SEPTEMBER 2013 – REVISED FEBRUARY 2014

Device Functional Modes (continued)

Figure 30. Timing Diagram for Right-Justified Mode

For right-justified mode, the number of bit-clocks per frame should be greater than twice the programmed word-

length of the data.

7.4.1.2 Left-Justified Mode

Set Register 0x03, D(7:6) = 01 and Register 0x05, D(3:2) = 11 to place the TAS2553 audio interface into left-

justified mode. In left-justified mode, the MSB of the right channel is valid on the rising edge of the bit clock

following the falling edge of the word clock. Similarly the MSB of the left channel is valid on the rising edge of the

bit clock following the rising edge of the word clock.

Figure 31. Timing Diagram for Left-Justified Mode

Figure 32. Timing Diagram for Light-Left Mode with Offset=1

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