| 数据搜索系统,热门电子元器件搜索 |
|
PIC16F72/ML 数据表(PDF) 29 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
PIC16F72/ML 数据表(HTML) 29 Page - Microchip Technology |
|
29 / 136 page ![]() 2002 Microchip Technology Inc. DS39597B-page 27 PIC16F72 4.0 READING PROGRAM MEMORY The FLASH Program Memory is readable during nor- mal operation over the entire VDD range. It is indirectly addressed through Special Function Registers (SFR). Up to 14-bit wide numbers can be stored in memory for use as calibration parameters, serial numbers, packed 7-bit ASCII, etc. Executing a program memory location containing data that forms an invalid instruction results in a NOP. There are five SFRs used to read the program and memory: • PMCON1 • PMDATL • PMDATH • PMADRL • PMADRH The program memory allows word reads. Program memory access allows for checksum calculation and reading calibration tables. When interfacing to the program memory block, the PMDATH:PMDATL registers form a two-byte word, which holds the 14-bit data for reads. The PMADRH:PMADRL registers form a two-byte word, which holds the 13-bit address of the FLASH location being accessed. This device has up to 2K words of program FLASH, with an address range from 0h to 07FFh. The unused upper bits PMDATH<7:6> and PMADRH<7:5> are not implemented and read as zeros. 4.1 PMADR The address registers can address up to a maximum of 8K words of program FLASH. When selecting a program address value, the MSByte of the address is written to the PMADRH register and the LSByte is written to the PMADRL register. The upper MSbits of PMADRH must always be clear. 4.2 PMCON1 Register PMCON1 is the control register for memory accesses. The control bit RD initiates read operations. This bit cannot be cleared, only set, in software. It is cleared in hardware at the completion of the read operation. REGISTER 4-1: PMCON1: PROGRAM MEMORY CONTROL REGISTER 1 (ADDRESS 18Ch) R-1 U-0 U-0 U-0 U-0 U-0 U-0 R/S-0 reserved — — — — — — RD bit 7 bit 0 bit 7 Reserved: Read as ‘1’ bit 6-1 Unimplemented: Read as ‘0’ bit 0 RD: Read Control bit 1 = Initiates a FLASH read, RD is cleared in hardware. The RD bit can only be set (not cleared) in software. 0 = Does not initiate a FLASH read Legend: W = Writable bit U = Unimplemented bit, read as ‘0’ R = Readable bit S = Settable bit -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |