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PIC16F72/ML 数据表(PDF) 18 Page - Microchip Technology

部件名 PIC16F72/ML
功能描述  28-Pin, 8-Bit CMOS FLASH MCU with A/D Converter
PDF  136 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

PIC16F72/ML 数据表(HTML) 18 Page - Microchip Technology

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PIC16F72
DS39597B-page 16
 2002 Microchip Technology Inc.
2.2.2.5
PIR1 Register
This register contains the individual flag bits for the
Peripheral interrupts.
REGISTER 2-5:
PIR1: PERIPHERAL INTERRUPT FLAG REGISTER 1 (ADDRESS 0Ch)
U-0
R/W-0
U-0
U-0
R/W-0
R/W-0
R/W-0
R/W-0
—
ADIF
—
—
SSPIF
CCP1IF
TMR2IF
TMR1IF
bit 7
bit 0
bit 7
Unimplemented: Read as ‘0’
bit 6
ADIF: A/D Converter Interrupt Flag bit
1
= An A/D conversion completed
0
= The A/D conversion is not complete
bit 5-4
Unimplemented: Read as ‘0’
bit 3
SSPIF: Synchronous Serial Port (SSP) Interrupt Flag bit
1
= The SSP interrupt condition has occurred, and must be cleared in software before returning
from the Interrupt Service Routine.
The conditions that will set this bit are a transmission/reception has taken place.
0
= No SSP interrupt condition has occurred
bit 2
CCP1IF: CCP1 Interrupt Flag bit
Capture mode:
1
= A TMR1 register capture occurred (must be cleared in software)
0
= No TMR1 register capture occurred
Compare mode:
1
= A TMR1 register compare match occurred (must be cleared in software)
0
= No TMR1 register compare match occurred
PWM mode:
Unused in this mode
bit 1
TMR2IF: TMR2 to PR2 Match Interrupt Flag bit
1
= TMR2 to PR2 match occurred (must be cleared in software)
0
= No TMR2 to PR2 match occurred
bit 0
TMR1IF: TMR1 Overflow Interrupt Flag bit
1
= TMR1 register overflowed (must be cleared in software)
0
= TMR1 register did not overflow
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
- n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown



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