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PIC16F72/ML 数据表(PDF) 92 Page - Microchip Technology |
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PIC16F72/ML 数据表(HTML) 92 Page - Microchip Technology |
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92 / 136 page  PIC16F72 DS39597B-page 90 2002 Microchip Technology Inc. IDD Supply Current (Notes 2, 5) D010 D010A PIC16LF72 — — 0.4 25 2.0 48 mA µA XT, RC osc configuration FOSC = 4 MHz, VDD = 3.0V (Note 4) LP osc configuration FOSC = 32 kHz, VDD = 3.0V, WDT disabled D010 D013 PIC16F72 - — 0.9 5.2 4 15 mA mA XT, RC osc configuration FOSC = 4 MHz, VDD = 5.5V (Note 4) HS osc configuration FOSC = 20 MHz, VDD = 5.5V D015* ∆IBOR Brown-out Reset Current (Note 6) — 25 200 µA BOR enabled, VDD = 5.0V IPD Power-down Current (Notes 3, 5) D020 D021 PIC16LF72 — — 2.0 0.1 30 5 µA µA VDD = 3.0V, WDT enabled, -40 °C to +85°C VDD = 3.0V, WDT disabled, -40 °C to +85°C D020 D021 PIC16F72 — 5.0 0.1 42 19 µA µA VDD = 4.0V, WDT enabled, -40 °C to +85°C VDD = 4.0V, WDT disabled, -40 °C to +85°C D023* ∆IBOR Brown-out Reset Current (Note 6) — 25 200 µA BOR enabled, VDD = 5.0V 14.1 DC Characteristics: PIC16F72 (Industrial, Extended) PIC16LF72 (Industrial) (Continued) PIC16LF72 (Industrial) Standard Operating Conditions (unless otherwise stated) Operating temperature -40°C ≤ TA ≤ +85°C for industrial PIC16F72 (Industrial, Extended) Standard Operating Conditions (unless otherwise stated) Operating temperature -40°C ≤ TA ≤ +85°C for industrial -40°C ≤ TA ≤ +125°C for extended Param No. Sym Characteristic Min Typ† Max Units Conditions * These parameters are characterized but not tested. † Data in "Typ" column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested. Note 1: This is the limit to which VDD can be lowered without losing RAM data. 2: The supply current is mainly a function of the operating voltage and frequency. Other factors, such as I/O pin loading and switching rate, oscillator type, internal code execution pattern and temperature, also have an impact on the current consumption. The test conditions for all IDD measurements in active Operation mode are: OSC1 = external square wave, from rail-to-rail; all I/O pins tri-stated, pulled to VDD MCLR = VDD; WDT enabled/disabled as specified. 3: The power-down current in SLEEP mode does not depend on the oscillator type. Power-down current is measured with the part in SLEEP mode, with all I/O pins in hi-impedance state and tied to VDD and VSS. 4: For RC osc configuration, current through REXT is not included. The current through the resistor can be estimated by the formula Ir = VDD/2REXT (mA) with REXT in k Ω. 5: Timer1 oscillator (when enabled) adds approximately 20 µA to the specification. This value is from characterization and is for design guidance only. This is not tested. 6: The ∆ current is the additional current consumed when this peripheral is enabled. This current should be added to the base IDD or IPD measurement. 7: When BOR is enabled, the device will operate correctly until the VBOR voltage trip point is reached. |
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