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PIC16F72/ML 数据表(PDF) 65 Page - Microchip Technology |
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PIC16F72/ML 数据表(HTML) 65 Page - Microchip Technology |
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65 / 136 page  2002 Microchip Technology Inc. DS39597B-page 63 PIC16F72 FIGURE 11-4: SIMPLIFIED BLOCK DIAGRAM OF ON-CHIP RESET CIRCUIT 11.4 MCLR PIC16F72 device has a noise filter in the MCLR Reset path. The filter will detect and ignore small pulses. It should be noted that a WDT Reset does not drive MCLR pin low. The behavior of the ESD protection on the MCLR pin has been altered from previous devices of this family. Voltages applied to the pin that exceed its specification can result in both MCLR and excessive current beyond the device specification during the ESD event. For this reason, Microchip recommends that the MCLR pin no longer be tied directly to VDD. The use of an RC network, as shown in Figure 11-5, is suggested. FIGURE 11-5: RECOMMENDED MCLR CIRCUIT S R Q External RESET MCLR VDD OSC1 WDT Module VDD Rise Detect OST/PWRT On-chip RC OSC WDT Time-out Power-on Reset OST 10-bit Ripple Counter PWRT Chip_Reset 10-bit Ripple Counter Reset Enable OST Enable PWRT SLEEP Note 1: This is a separate oscillator from the RC oscillator of the CLKI pin. Brown-out Reset BOREN (1) C1 0.1 µF R1 1 k Ω (or greater) (optional, not critical) VDD MCLR PIC16F72 |
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