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PIC16F72/ML 数据表(PDF) 68 Page - Microchip Technology |
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PIC16F72/ML 数据表(HTML) 68 Page - Microchip Technology |
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68 / 136 page  PIC16F72 DS39597B-page 66 2002 Microchip Technology Inc. TABLE 11-6: INITIALIZATION CONDITIONS FOR ALL REGISTERS Register Power-on Reset, Brown-out Reset MCLR Reset, WDT Reset Wake-up via WDT or Interrupt W xxxx xxxx uuuu uuuu uuuu uuuu INDF N/A N/A N/A TMR0 xxxx xxxx uuuu uuuu uuuu uuuu PCL 0000h 0000h PC + 1(2) STATUS 0001 1xxx 000q quuu(3) uuuq quuu(3) FSR xxxx xxxx uuuu uuuu uuuu uuuu PORTA --0x 0000 --0u 0000 --uu uuuu PORTB xxxx xxxx uuuu uuuu uuuu uuuu PORTC xxxx xxxx uuuu uuuu uuuu uuuu PCLATH ---0 0000 ---0 0000 ---u uuuu INTCON 0000 000x 0000 000u uuuu uuuu(1) PIR1 -0-- 0000 -0-- 0000 -u-- uuuu(1) TMR1L xxxx xxxx uuuu uuuu uuuu uuuu TMR1H xxxx xxxx uuuu uuuu uuuu uuuu T1CON --00 0000 --uu uuuu --uu uuuu TMR2 0000 0000 0000 0000 uuuu uuuu T2CON -000 0000 -000 0000 -uuu uuuu SSPBUF xxxx xxxx uuuu uuuu uuuu uuuu SSPCON 0000 0000 0000 0000 uuuu uuuu CCPR1L xxxx xxxx uuuu uuuu uuuu uuuu CCPR1H xxxx xxxx uuuu uuuu uuuu uuuu CCP1CON --00 0000 --00 0000 --uu uuuu ADRES xxxx xxxx uuuu uuuu uuuu uuuu ADCON0 0000 00-0 0000 00-0 uuuu uu-u OPTION 1111 1111 1111 1111 uuuu uuuu TRISA --11 1111 --11 1111 --uu uuuu TRISB 1111 1111 1111 1111 uuuu uuuu TRISC 1111 1111 1111 1111 uuuu uuuu PIE1 -0-- 0000 -0-- 0000 -u-- uuuu PCON ---- --qq ---- --uu ---- --uu PR2 1111 1111 1111 1111 1111 1111 SSPADD 0000 0000 0000 0000 uuuu uuuu SSPSTAT --00 0000 --00 0000 --uu uuuu ADCON1 ---- -000 ---- -000 ---- -uuu PMDATL 0--- 0000 0--- 0000 u--- uuuu PMADRL xxxx xxxx uuuu uuuu uuuu uuuu PMDATH xxxx xxxx uuuu uuuu uuuu uuuu PMADRH xxxx xxxx uuuu uuuu uuuu uuuu PMCON1 1--- ---0 1--- ---0 1--- ---u Legend: u = unchanged, x = unknown, - = unimplemented bit, read as ’0’, q = value depends on condition, r = reserved, maintain clear. Note 1: One or more bits in INTCON, PIR1 will be affected (to cause wake-up). 2: When the wake-up is due to an interrupt and the GIE bit is set, the PC is loaded with the interrupt vector (0004h). 3: See Table 11-5 for RESET value for specific condition. |
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