PC87413 datasheet(91/257 Pages) NSC

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4.0 LPC Bus Interface (Continued)

Revision 1.2

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4.3

CLKRUN FUNCTIONALITY

The PC8741x devices support the CLKRUN I/O signal, which is implemented according to the specification in PCI Mobile

Design Guide, Revision 1.1, December 18, 1998. The PC8741x devices support operation with both a slow and stopped

clock in ACPI state S0 (the system is active but is not being accessed). In the following cases, the PC8741x device drives

the CLKRUN signal low to force the LPC bus clock into full speed operation:

An IRQ is pending internally, waiting to be sent through the serial IRQ.

A DMA request is pending internally, waiting to be sent through the serial DMA.

Note: When the CLKRUN signal is not in use, the PC8741x devices assume a valid clock on the LCLK pin.

4.4

INTERRUPT SERIALIZER

The Interrupt Serializer translates parallel interrupt request (PIRQ) signals received from external devices, via the XIRQ pin

(PC87416 and PC87417) and from internal IRQ sources, into serial interrupt request data transmitted over the SERIRQ bus.

This enables devices that support only parallel IRQs to be integrated into a system that supports only serial IRQs.

The external XIRQ signal and the internal IRQs are fed into a Mapping, Enable and Polarity Control block, which maps them

to their associated IRQ slots. The IRQs are then fed into the Interrupt Serializer, where they are translated into serial data

and transmitted over the SERIRQ bus.

The XIRQ input value is routed to the Interrupt Serializer as the IRQn value to be driven onto IRQ slot n.

The same slot cannot be shared among different interrupt sources in the device.

When a transition is sensed on an IRQ source, the new value of the IRQ source is transmitted over the SERIRQ bus during

the corresponding IRQ slot. For example, when a transition on XIRQ is sensed, the new value of XIRQ is transmitted during

slot n of the SERIRQ bus.

Figure 11 shows the mechanism for both interrupt serialization and wake-up.

Figure 11. Interrupt Serialization and Wake-Up Mechanism

IRQ Mapping

and Polarity

Control

Internal

IRQ

Sources

Control

Signals

XIRQ

Interrupt

Serializer

Bus Interface

SERIRQ

IRQ1

IRQ15

Wake-Up

Enable

Control

SWC

(PC87416 and PC87417)

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