数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

CS8952 数据表(PDF) 53 Page - Cirrus Logic

部件名 CS8952
功能描述  CrystalLAN 100BASE-X and 10BASE-T Transceiver
PDF  82 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  CIRRUS [Cirrus Logic]
网页  http://www.cirrus.com
标志 CIRRUS - Cirrus Logic

CS8952 数据表(HTML) 53 Page - Cirrus Logic

Back Button CS8952 Datasheet HTML 49Page - Cirrus Logic CS8952 Datasheet HTML 50Page - Cirrus Logic CS8952 Datasheet HTML 51Page - Cirrus Logic CS8952 Datasheet HTML 52Page - Cirrus Logic CS8952 Datasheet HTML 53Page - Cirrus Logic CS8952 Datasheet HTML 54Page - Cirrus Logic CS8952 Datasheet HTML 55Page - Cirrus Logic CS8952 Datasheet HTML 56Page - Cirrus Logic CS8952 Datasheet HTML 57Page - Cirrus Logic Next Button
Zoom Inzoom in Zoom Outzoom out
 53 / 82 page
background image
CS8952
CrystalLAN™ 100BASE-X and 10BASE-T Transceiver
53
6.16
PCS Sub-Layer Configuration Register - Address 17h
15
14
13
12
11
10
9
8
NRZI Enable
Time-Out
Select
Time-Out
Disable
Repeater
Mode
LED5 Mode
Unlock Regs
MR Preamble
Enable
Fast Test
765
4321
0
CLK25 Disable Enable LT/100
CIM Disable
Tx Disable
Rx Disable
LED1 Mode
LED4 Mode
Digital Reset
BIT
NAME
TYPE
RESET
DESCRIPTION
15
NRZI Enable
Read/Write 1
When this bit is set, the NRZI encoder and decoder
are enabled. When this bit is clear, NRZI encoding
and decoding are disabled.
14
Time-Out Select
Read/Write 0
When this bit is set, the time-out counter in the
receive descrambler is set to time-out after 2 ms
without IDLES. When clear the counter is set to time-
out after 722
µs without IDLES.
13
Time-Out Disable
Read/Write 0
When this bit is set, the time-out counter in the
receive descrambler is disabled. When this bit is
clear, the time-out counter is enabled.
12
Repeater Mode
Read/Write Reset to the value
on the
REPEATER pin.
This bit defines the mode of the Carrier Sense (CRS)
signal. When this bit is set, CRS is asserted due to
receive activity only. When this bit is clear, CRS is
asserted due to either transmit or receive activity.
11
LED5 Mode
Read/Write 0
This bit defines the mode of Pin LED5. When this bit
is set, pin LED5 indicates the synchronization status
of the 100BASE-TX descrambler. When this bit is
clear, LED5 indicates a collision.
Note: This bit is disabled, and writes to this bit are
ignored when the National Compatibility Mode bit of
the 10BASE-T Configuration Register (address 1Ch)
is set.
10
Unlock Regs
Read/Write 0
When set, this bit unlocks certain read only control
registers for factory testing. Leave clear for proper
operation.
Note: This bit is disabled, and writes to this bit are
ignored when the National Compatibility Mode bit of
the 10BASE-T Configuration Register (address 1Ch)
is set.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com