CS8952 datasheet(24/82 Pages) CIRRUS

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CS8952

CrystalLAN™ 100BASE-X and 10BASE-T Transceiver

RX_CLK, RX_DV, COL, and CRS) onto a shared,

external repeater system bus.

3.1.3

10BASE-T MII Application

The digital interface used in this mode is the same

as that used in the 100BASE-X MII mode except

that TX_CLK and RX_CLK are nominally

2.5 MHz.

The CS8952 includes a full-featured 10BASE-T in-

terface, as described in the following sections.

3.1.3.1

Full and Half Duplex operation

The 10BASE-T function supports full and half du-

plex operation as determined by pins AN[1:0]

and/or the corresponding MII register bits. (See Ta-

ble 5).

3.1.3.2

Collision Detection

If half duplex operation is selected, the CS8952 de-

tects a 10BASE-T collision whenever the receiver

and transmitter are active simultaneously. When a

collision is present, the collision is reported on pin

COL. Collision detection is undefined for full-du-

plex operation.

3.1.3.3

Jabber

The jabber timer monitors the transmitter and dis-

ables the transmission if the transmitter is active for

greater than approximately 105 ms. The transmitter

stays disabled until approximately 406 ms after the

internal transmit request is no longer enabled.

3.1.3.4

Link Pulses

To prevent disruption of network operation due to a

faulty link segment, the CS8952 continually moni-

tors the 10BASE-T receive pair (RXD+ and RXD-)

for packets and link pulses. After each packet or link

pulse is received, an internal Link-Loss timer is

started. As long as a packet or link pulse is received

before the Link-Loss timer finishes (between 50 and

100 ms), the CS8952 maintains normal operation. If

no receive activity is detected, the CS8952 disables

packet transmission to prevent “blind” transmis-

sions onto the network (link pulses are still sent

while packet transmission is disabled). To reactivate

transmission, the receiver must detect a single pack-

et (the packet itself is ignored), or two normal link

pulses separated by more than 6 ms and no more

than 50 ms.

The CS8952 automatically checks the polarity of

the receive half of the twisted pair cable. To detect

a reversed pair, the receiver examines received link

pulses and the End-of-Frame (EOF) sequence of

incoming packets. If it detects at least one reversed

link pulse and at least four frames in a row with

negative polarity after the EOF, the receive pair is

considered reversed. If the polarity is reversed and

bit 1 of the 10BASE-T Configuration Register (ad-

dress 1Ch), is set, the CS8952 automatically cor-

rects a reversal.

In the absence of transmit packets, the transmitter

generates

link

pulses

accordance

with

Section 14.2.1.1 of the Ethernet standard. Trans-

mitted link pulses are positive pulses, one bit time

wide, typically generated at a rate of one every

16 ms. The 16 ms timer also starts whenever the

transmitter completes an End-of-Frame (EOF) se-

quence. Thus, a link pulse will be generated 16 ms

after an EOF unless there is another transmitted

packet.

3.1.3.5

Receiver Squelch

The 10BASE-T squelch circuit determines when

valid data is present on the RXD+/RXD- pair. In-

coming signals passing through the receive filter

are tested by the squelch circuit. Any signal with

amplitude less than the squelch threshold (either

positive or negative, depending on polarity) is re-

jected.

3.1.3.6

10BASE-T Loopback

When Loopback is selected, the TXD[3:0] pins are

looped back into the RXD[3:0] pins through the

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