CS8952 datasheet(77/82 Pages) CIRRUS

77 / 82 page

CS8952

CrystalLAN™ 100BASE-X and 10BASE-T Transceiver

REPEATER - REPEATER Mode Select. Input, Pin 16.

This pin controls the operation of the CRS (Carrier Sense) pin as shown below:

At power-up or at reset, the value on this pin is latched into bit 12 of the PCS Sub-Layer Configuration

Ω), or the value may be set

by an external 4.7 K

Ω pull-up or pull-down resistor.

SPD10 - 10 Mb/s Speed Indication. Output, Pin 68.

This pin is asserted high when the CS8952 is configured for 10 Mb/s operation. This pin can be used to

drive a low-current LED to indicate 10 Mb/s operation.

SPD100 - 100 Mb/s Speed Indication. Output, Pin 67.

This pin is asserted high when the CS8952 is configured for 100 Mb/s operation. This pin can be used

to drive a low-current LED to indicate 100 Mb/s operation.

TCM - Transmit Clock Mode Initialization. Input, Pin 59.

The logic value on this three-level pin during power-up or reset determines whether TX_CLK is used as

an input or an output, and whether an external 25 MHz clock reference is provided on the CLK25 output

pin.

TEST[1:0] - Factory Test. Input, Pins 24 and 25.

These pins are for factory test only. They include weak internal pull-downs (> 20 K

Ω), and should be tied

directly to VSS for normal operation.

REPEATER pin

DUPLEX mode

CRS Indicates

high

don’t care

receive activity only

low

full duplex

receive activity only

low

half duplex

receive or transmit activity

TCM pin

TX_CLK mode

CLK25 status

high

TX_CLK is input

CLK25 pin is an output

floating

TX_CLK is input

CLK25 is disabled

low

TX_CLK is output

CLK25 is disabled

CS8952 数据表(PDF) 77 Page - Cirrus Logic

CS8952 数据表(HTML) 77 Page - Cirrus Logic

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