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CS8952 数据表(PDF) 13 Page - Cirrus Logic |
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CS8952 数据表(HTML) 13 Page - Cirrus Logic |
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13 / 82 page  CS8952 CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 13 10BASE-T MII RECEIVE TIMING Parameter Symbol Min Typ Max Unit RX_CLK Period tP -400 - ns RX_CLK Pulse Width tWL, tWH -200 - ns RXD[3:0],RX_ER,RX_DV setuptorisingedgeof RX_CLK tSU 30 - - ns RXD[3:0], RX_ER, RX_DV hold from rising edge of RX_CLK tHD 30 - - ns RX data valid from CRS tRLAT -8 10 BT RX+/- preamble to CRS asserted tCRS1 -5 7 BT RX+/- end of packet to CRS de-asserted tCRS2 2.5 3 BT RX+/- preamble to COL asserted tCOL1 0- 7 BT RX+/- end of packet to COL de-asserted tCOL2 -- 3 BT RX_EN asserted to RX_DV, RXD[3:0], RX_ER valid tEN - - 60 ns RX_EN de-asserted to RX_DV, RXD[3:0]. RX_ER in high impedance state tDIS - - 60 ns RX_CLK RXD[3:0], CRS tCRS1 tCOL2 tRLAT RX_EN RX+/- RX_DV IN OUT IN OUT OUT OUT COL tCOL1 tCRS2 tHD tEN tDIS RX_ER tWL tWH tP tSU OUT |
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