CS8952 datasheet(14/82 Pages) CIRRUS

14 / 82 page

CS8952

CrystalLAN™ 100BASE-X and 10BASE-T Transceiver

10BASE-T MII TRANSMIT TIMING

Parameter

Symbol

Min

Typ

Max

Unit

TXD[3:0] Setup to TX_CLK High

tSU1

TX_ER Setup to TX_CLK High

tSU2

TX_EN Setup to TX_CLK High

tSU3

TXD[3:0] Hold after TX_CLK High

tHD1

TX_ER Hold after TX_CLK High

tHD2

TX_EN Hold after TX_CLK High

tHD3

TX_EN “high” to CRS asserted latency

tCRS1

TX_EN “low” to CRS de-asserted latency

tCRS2

TX_EN “high” to TX+/- output (TX Latency)

tLAT

SQE Timing

COL (SQE) Delay after CRS de-asserted

tCOL

0.65

0.9

1.6

µs

COL (SQE) Pulse Duration

tCOLP

0.65

1.0

1.6

µs

TX_CLK

TX_EN

TX_ER

TXD[3:0]

CRS

TX+/-

tSU3

tSU2

tSU1

tHD3

tHD2

tHD1

tCRS1

tCRS2

tLAT

Valid

Data

Input/Output

Input

Output

TX_CLK

tSQE

COL

tSQEP

Input/Output

Output

SQE Timing

10BASE-T Transmit Timing

CS8952 数据表(PDF) 14 Page - Cirrus Logic

CS8952 数据表(HTML) 14 Page - Cirrus Logic

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82

数据表下载