| 数据搜索系统,热门电子元器件搜索 |
|
CS8952 数据表(PDF) 61 Page - Cirrus Logic |
|
|
|||||||||||||||||||||||||||||
CS8952 数据表(HTML) 61 Page - Cirrus Logic |
|
61 / 82 page ![]() CS8952 CrystalLAN™ 100BASE-X and 10BASE-T Transceiver 61 6.19 10BASE-T Status Register - Address 1Bh 15 14 13 12 11 10 9 8 Reserved Polarity OK 10BASE-T Serial Reserved 765 4321 0 Reserved BIT NAME TYPE RESET DESCRIPTION 15:11 Reserved Read Only 0 0000 10 Polarity OK Read Only 0 When high, the polarity of the receive signal (at the RXD+/RXD- inputs) is correct. If clear, the polarity is reversed. If the Polarity Disable bit of 10BASE-T Configuration Register (address 1Ch) is clear, then the polarity is automatically corrected, if needed. The Polarity OK status bit shows the true state of the incoming polarity independent of the Polarity Disable bit. 9 10BASE-T Serial Read/Write Reset to the value on the 10BT_SER pin. When set, this bit selects 10BASE-T serial mode. When low, this bit selects 10BASE-T nibble mode. This bit will only affect the CS8952 if it has been con- figured for 10 Mb/s operation. 8:0 Reserved Read Only 0 0000 0000 |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |