AR8327-AL1A-R datasheet(83/394 Pages) ETC2

83 / 394 page

Atheros Communications, Inc.

AR8327/AR8327N Seven-port Gigabit Ethernet

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3.2.33

PORT1_HEADER_CTRL

Address 0x00A0

SFT&HW RST

Table 3-36 summarizes the PORT1_HEADER_CTRL Register.

3.2.34

PORT2_HEADER_CTRL

Address 0x00A4

SFT&HW RST

3:2

R/W

RX_HEADER_MODE_0 0x0:no header;

0x1: only management with header, must be

under 4 bytes header mode.

0x2: all frame with header;

0x3: reserved

1:0

R/W

TX_HEADER_MODE_0 0x0:no header;

0x1: only management with header; must be

under 4 bytes header mode.

0x2: all frame with header;

0x3: reserved

Table 3-35.

PORT 0 Header Control Register

Bit

R/W

Inital

Value

Mnemonic

Description

Table 3-36.

PORT 1 Header Control Register

Bit

R/W

Inital

Value

Mnemonic

Description

31:6

R/O

RESERVED

R/W

IPG_DEC_EN_1

1'b1: mac will decrease two bytes of IPG when

send out frame and receive check.

1'b0: normal IPG 96 bit time

R/W

MAC_LOOP_BACK_1

1'b1: enable mac loop back at gmii/mii interface

3:2

R/W

RX_HEADER_MODE_1

0x0:no header;

0x1: only management with header, must be

under 4 bytes header mode.

0x2: all frame with header;

0x3: reserved

1:0

R/W

TX_HEADER_MODE_1

0x0:no header;

0x1: only management with header; must be

under 4 bytes header mode.

0x2: all frame with header;

0x3: reserved

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