AR8327-AL1A-R datasheet(2/394 Pages) ETC2

2 / 394 page

2 • AR8327/AR8327N Seven-port Gigabit Ethernet Switch

Atheros Communications, Inc.

2 • June 2011

COMPANY CONFIDENTIAL

n The AR8327 chip (without the ‘N’

designation) does not contain the Hardware

NAT function

n ACL Mask Rule from Layer1~4. Port No,

DA, SA, Ethernet Type, VLAN, IP Protocol,

IPv4/v6 Source/Destination Address,

TCP/UDP Source/Destination port

n 96 ACL Mask Rule for Pass/Drop, VLAN/

Q.O.S./DSCP Mapping/Translation

n User define ACL up to 48 bytes depth in

Layer 4/3/2

n Q.O.S mechanisms include Weight Round

Robin, Strict, Hybrid Up Queue

n Port Base VLAN & 4K 802.1Q VLAN Group

n IVL & SVL

n IGMP Snooping V1, V2 & V3. IPv6 MLD V1/

V2 forwarded to CPU

n Supports Light Hardware IGMP snooping

v1/v2/v3, MLDv1/v2 and Smart Leave

n Hardware Looping Detection

n QinQ function for SVLAN & CVLAN

Translation

n IP Packet/PPPoE bypass to reduce CPU

loading on Video packet

n 16 PPPoE session support/PPP Session

Header Removal/Addition

n Scalable Ingress/Egress Bandwidth Control

n 40 MIBs Counter/Port & Port Status.

n 1M Bit Packet Buffer

n Supports 9K Jumbo Frame

n Port Mirror, 802.1X Security, Rapid Spanning

Tree

n Rule-based Bandwidth Control

n Programmable Wake on LAN

n Half Power Mode for Cable length less than

30m (for home installations)

n Supports Internal/External Loopback

n Supports Reduced AFE circuit

n 2K MAC Table. Edit, Search, Add & Delete.

n MAC Limit by Port/Chip/VLAN

n Trunking Function

n Supports Trunking and auto-failover

n Power Saving on Cable no Link, short Cable

& 10BASE-Te Idle

n Supports 1K NAPT entries and 128

hardware based host routing (ARP) entries

n Supports hardware-based IP source guard,

ARP inspection, routing/L3 switching

n Supports VLAN translation and mapping

with 64 Translation entries

n 148 pin DRQFN, 0.11um

AR8327 System Block Diagram

Configuration

Registers

MB/Statistics

Counters

LED

Controller

MDC/MDIO

QoS Engine

Buffer Memory

VLAN Table

Lookup Engine

MAC Table Memory

Queue Manager

Bandwidth Control

7-Port Gigabit Ethernet Switch Engine

Port 0

GMAC

GMII/

RGMII

Port 1

GMAC

10/100 /1000

Based -T

PHY

Port 2

GMAC

Port 3

GMAC

Port 4

GMAC

Port 5

GMAC

EEPROM

LED

MDC/

MDIO

10/100 /1000

Based -T

PHY

10/100 /1000

Based -T

PHY

10/100 /1000

Based -T

PHY

10/100 /1000

Based -T

PHY

RGMII

Port 6

GMAC

Serdes

Port 0

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