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AR8327-AL1A-R 数据表(PDF) 129 Page - List of Unclassifed Manufacturers |
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AR8327-AL1A-R 数据表(HTML) 129 Page - List of Unclassifed Manufacturers |
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129 / 394 page ![]() Atheros Communications, Inc. AR8327/AR8327N Seven-port Gigabit Ethernet Switch • 129 3.6.6 VTU_FUNC_REG1 Address 0x0614 SFT&HW RST Table 3-112 summerizes the VTU_FUNC_REG1 Register 1 Table 3-112. VTU Function Register 1 18 R/W W 0 VTU_LEARN_LOOKUP_DIS 1:indicates no learn and not use arl table DP calculate final DP, but use uni flood DP as ARL DP to calculate DP 0:indicates normal operation about learn and final DP 17:4 R/W W 0 VTU_EG_VLAN_MODE 5:4 for port0, 7:6 for port1 …17:16 for port6 2'b00: unmodified 2'b01: untagged 2'b10: tagged 2'b11: not member 3 R/W W 0 VTU_PRI_OVER_EN VLAN Priority override enable. 2:0 R/W W 0 VTU_PRI This priority bits may be used as frame's priority when VTU_PRI_OVER_EN set to one. Bit R/W Inital Value Mnemonic Description Bit R/W Inital Value Mnemonic Description 31 R/W SC 0 VT_BUSY DEPEND:VT_DONE, VLAN table busy. This bit must be set to 1'b1 to start a VT operation and cleared to zero after operation done. If this bit is set to 1'b1, cpu can't request another operation. 30:28 R/O 0 RESERVED 27:16 R/W W 0 VID DEPEND:VT_DONE,VT_CSR_VID[11:0], Value of VLAN ID to be added or purged. 15:12 R/O 0 RESERVED 11:8 R/W 0 VT_PORT_NUM Port number. 7:5 R/O 0 RESERVED 4 R/O C 0 VT_FULL_VIO VLAN table full violation. This bit is set to 1'b1 if the VLAN table is full when cpu want to add a new VID to VLAN table. |
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