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AR8327-AL1A-R 数据表(PDF) 224 Page - List of Unclassifed Manufacturers |
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AR8327-AL1A-R 数据表(HTML) 224 Page - List of Unclassifed Manufacturers |
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224 / 394 page ![]() 224 • AR8327/AR8327N Seven-port Gigabit Ethernet Switch Atheros Communications, Inc. 224 • June 2011 COMPANY CONFIDENTIAL Table 3-197, “Port 5 Rate Limit Control Register 2,” on page 224 summarizes the PORT5_EG_RATE_CTRL2 Register 2 Table 3-197. Port 5 Rate Limit Control Register 2 3.7.47 PORT5_EG_RATE_CTRL3 Address 0x093C SFT&HW RST Table 3-198, “Port 5 Rate Limit Control Register 3,” on page 224 Port 5 Rate Limit Control Register 3 Table 3-198. Port 5 Rate Limit Control Register 3 Bit R/W Inital Value Mnemonic Description 31 R/O 0 RESERVED 30:16 R/W 0x7FFF EG_PRI5_CIR_5 Egress Rate Limit for priority 5. Rate is limited to times of 32kbps. Default 15'h7FFF is for disable rate limit for egress priority 5. if these bits are set to 15'h0, no priority 5 frame should be send out from this port. 15 R/O 0 RESERVED 14:0 R/W 0x7FFF EG_PRI4_CIR_5 Egress Rate Limit for priority 4. Rate is limited to times of 32kbps. Default 15'h7FFF is for disable rate limit for egress priority 4. if these bits are set to 15'h0, no priority 4 frame should be send out from this port. Bit R/W Inital Value Mnemonic Description 31 R/O 0 RESERVED 30:16 R/W 0x7FFF EG_PRI1_EIR_5 Egress Rate Limit for priority 1. Rate is limited to times of 32kbps. Default 15'h7FFF is for disable rate limit for egress priority 1. if these bits are set to 15'h0, no priority 1 frame should be send out from this port. |
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