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DSPIC33EP64GS708 数据表(PDF) 117 Page - Microchip Technology |
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DSPIC33EP64GS708 数据表(HTML) 117 Page - Microchip Technology |
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117 / 484 page ![]() 2016-2018 Microchip Technology Inc. DS70005258C-page 117 dsPIC33EPXXXGS70X/80X FAMILY 10.0 POWER-SAVING FEATURES The dsPIC33EPXXXGS70X/80X family devices provide the ability to manage power consumption by selectively managing clocking to the CPU and the peripherals. In general, a lower clock frequency and a reduction in the number of peripherals being clocked constitutes lower consumed power. dsPIC33EPXXXGS70X/80X family devices can manage power consumption in four ways: • Clock Frequency • Instruction-Based Sleep and Idle modes • Software-Controlled Doze mode • Selective Peripheral Control in Software Combinations of these methods can be used to selectively tailor an application’s power consumption while still maintaining critical application features, such as timing-sensitive communications. 10.1 Clock Frequency and Clock Switching The dsPIC33EPXXXGS70X/80X family devices allow a wide range of clock frequencies to be selected under application control. If the system clock configuration is not locked, users can choose low-power or high-precision oscillators by simply changing the NOSCx bits (OSCCON<10:8>). The process of changing a system clock during operation, as well as limitations to the process, are discussed in more detail in Section 9.0 “Oscillator Configuration”. 10.2 Instruction-Based Power-Saving Modes The dsPIC33EPXXXGS70X/80X family devices have two special power-saving modes that are entered through the execution of a special PWRSAV instruc- tion. Sleep mode stops clock operation and halts all code execution. Idle mode halts the CPU and code execution, but allows peripheral modules to continue operation. The assembler syntax of the PWRSAV instruction is shown in Example 10-1. Sleep and Idle modes can be exited as a result of an enabled interrupt, WDT time-out or a device Reset. When the device exits these modes, it is said to “wake-up”. EXAMPLE 10-1: PWRSAV INSTRUCTION SYNTAX Note 1: This data sheet summarizes the features of the dsPIC33EPXXXGS70X/ 80X family of devices. It is not intended to be a comprehensive reference source. To complement the information in this data sheet, refer to “Watchdog Timer and Power-Saving Modes” (DS70615) in the “dsPIC33/PIC24 Family Reference Man- ual”, which is available from the Microchip website (www.microchip.com). 2: Some registers and associated bits described in this section may not be available on all devices. Refer to Section 4.0 “Memory Organization” in this data sheet for device-specific register and bit information. Note: SLEEP_MODE and IDLE_MODE are con- stants defined in the assembler include file for the selected device. PWRSAV #SLEEP_MODE ; Put the device into Sleep mode PWRSAV #IDLE_MODE ; Put the device into Idle mode |
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