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DSPIC33EP64GS708 数据表(PDF) 113 Page - Microchip Technology |
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DSPIC33EP64GS708 数据表(HTML) 113 Page - Microchip Technology |
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113 / 484 page ![]() 2016-2018 Microchip Technology Inc. DS70005258C-page 113 dsPIC33EPXXXGS70X/80X FAMILY REGISTER 9-4: OSCTUN: FRC OSCILLATOR TUNING REGISTER(1) U-0 U-0 U-0 U-0 U-0 U-0 U-0 U-0 — — — — — — — — bit 15 bit 8 U-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 — —TUN<5:0> bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 15-6 Unimplemented: Read as ‘0’ bit 5-0 TUN<5:0>: FRC Oscillator Tuning bits 011111 = Maximum frequency deviation of 1.457% (7.477 MHz) 011110 = Center frequency + 1.41% (7.474 MHz) • • • 000001 = Center frequency + 0.047% (7.373 MHz) 000000 = Center frequency (7.37 MHz nominal) 111111 = Center frequency – 0.047% (7.367 MHz) • • • 100001 = Center frequency – 1.457% (7.263 MHz) 100000 = Minimum frequency deviation of -1.5% (7.259 MHz) Note 1: OSCTUN functionality has been provided to help customers compensate for temperature effects on the FRC frequency over a wide range of temperatures. The tuning step-size is an approximation and is neither characterized nor tested. |
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