DS31256 datasheet(30/183 Pages) MAXIM

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DS31256 256-Channel, High-Throughput HDLC Controller

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4.9 Transmit DMA Registers (8xx)

OFFSET/

ADDRESS

NAME

SECTION

0800

TPQBA0

Transmit Pending-Queue Base Address 0 (lower word)

9.3.3

0804

TPQBA1

Transmit Pending-Queue Base Address 1 (upper word)

9.3.3

0808

TPQEA

Transmit Pending-Queue End Address

9.3.3

080C

TPQWP

Transmit Pending-Queue Host Write Pointer

9.3.3

0810

TPQRP

Transmit Pending-Queue DMA Read Pointer

9.3.3

0830

TDQBA0

Transmit Done-Queue Base Address 0 (lower word)

9.3.4

0834

TDQBA1

Transmit Done-Queue Base Address 1 (upper word)

9.3.4

0838

TDQEA

Transmit Done-Queue End Address

9.3.4

083C

TDQRP

Transmit Done-Queue Host Read Pointer

9.3.4

0840

TDQWP

Transmit Done-Queue DMA Write Pointer

9.3.4

0844

TDQFFT

Transmit Done-Queue FIFO Flush Timer

9.3.4

0850

TDBA0

Transmit Descriptor Base Address 0 (lower word)

9.3.2

0854

TDBA1

Transmit Descriptor Base Address 1 (upper word)

9.3.2

0870

TDMACIS

Transmit DMA Configuration Indirect Select

9.3.5

0874

TDMAC

Transmit DMA Configuration

9.3.5

0880

TDMAQ

Transmit DMA Queues Control

9.3.3/9.3.4

4.10 FIFO Registers (9xx)

OFFSET/

ADDRESS

NAME

SECTION

0900

RFSBPIS

Receive FIFO Starting Block Pointer Indirect Select

8.2

0904

RFSBP

Receive FIFO Starting Block Pointer

8.2

0910

RFBPIS

Receive FIFO Block Pointer Indirect Select

8.2

0914

RFBP

Receive FIFO Block Pointer

8.2

0920

RFHWMIS

Receive FIFO High-Watermark Indirect Select

8.2

0924

RFHWM

Receive FIFO High Watermark

8.2

0980

TFSBPIS

Transmit FIFO Starting Block Pointer Indirect Select

8.2

0984

TFSBP

Transmit FIFO Starting Block Pointer

8.2

0990

TFBPIS

Transmit FIFO Block Pointer Indirect Select

8.2

0994

TFBP

Transmit FIFO Block Pointer

8.2

09A0

TFLWMIS

Transmit FIFO Low-Watermark Indirect Select

8.2

09A4

TFLWM

Transmit FIFO Low Watermark

8.2

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