MPFS250T datasheet(19/128 Pages) MICROCHIP

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VIH

Max (V)

VIH

Min (V)

VIL

Max (V)

VIL

Min (V)

VDDI

Max (V)

VDDI

Typ (V)

VDDI

Min (V)

I/O Standard

1.26

VREF + 0.1

VREF – 0.1

–0.3

1.26

1.2

1.14

HSTL12I

1.26

VREF + 0.1

VREF – 0.1

–0.3

1.26

1.2

1.14

HSTL12II

1.89

0.7 × VDDI

0.3 × VDDI

–0.3

1.89

1.8

1.71

HSUL18I

1.89

0.7 × VDDI

0.3 × VDDI

–0.3

1.89

1.8

1.71

HSUL18II

1.26

VREF + 0.1

VREF – 0.1

–0.3

1.26

1.2

1.14

HSUL12I

1.26

VREF + 0.08

VREF – 0.08

–0.3

1.26

1.2

1.14

POD12I

1.26

VREF + 0.08

VREF – 0.08

–0.3

1.26

1.2

1.14

POD12II

1. GPIO VIH max is 3.45 V with PCI clamp diode turned off regardless of mode, that is, over-voltage tolerant.

2. For external stub-series resistance. This resistance is on-die for GPIO.

Note: 3.3 V and 2.5 V are only supported in GPIO banks.

Table 15 • DC Output Levels

IOH

2,6

IOL

2,6

VOH

Min (V)

VOL

Max (V)

VDDI

Max (V)

VDDI

Typ (V)

VDDI

Min (V)

I/O Standard

0.5

1.5

0.9 × VDDI

0.1 × VDDI

3.45

3.3

3.15

PCI

Refer to note

2.4

0.4

3.45

3.3

3.15

LVTTL

VDDI – 0.4

0.4

3.45

3.3

3.15

LVCMOS33

VDDI – 0.4

0.4

2.625

2.5

2.375

LVCMOS25

VDDI – 0.45

0.45

1.89

1.8

1.71

LVCMOS18

0.75 × VDDI

0.25 × VDDI

1.575

1.5

1.425

LVCMOS15

0.75 × VDDI

0.25 × VDDI

1.26

1.2

1.14

LVCMOS12

8.1

VTT + 0.608

VTT – 0.608

2.625

2.5

2.375

SSTL25I

16.2

VTT + 0.810

VTT – 0.810

2.625

2.5

2.375

SSTL25II

6.7

VTT + 0.603

VTT – 0.603

1.89

1.8

1.71

SSTL18I

13.4

VTT + 0.603

VTT – 0.603

1.89

1.8

1.71

SSTL18II

(VDDI – VOH)/4

VOL/40

0.8 × VDDI

0.2 × VDDI

1.575

1.5

1.425

SSTL15I

(VDDI – VOH)/3

VOL/34

0.8 × VDDI

0.2 × VDDI

1.575

1.5

1.425

SSTL15II

(VDDI – VOH)/4

VOL/40

0.8 × VDDI

0.2 × VDDI

1.418

1.35

1.283

SSTL135I

Microsemi Proprietary and Confidential. DS0147 Revision 1.0

DC Characteristics

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