MPFS250T datasheet(33/128 Pages) MICROCHIP

33 / 128 page

Unit

–1

Max

–1

Min

STD

Max

STD

Min

DRAM Type

Package

Memory

Standard

Mbps

2 rank DIMM

,3, 8

All

Mbps

1333

1066

1333

1066

Single die

package

All

LPDDR3

Mbps

1333

1066

1333

1066

Dual die pack-

age

All

1. Dual in-line memory module (DIMM) includes RDIMM, SODIMM, and UDIMM.

2. Includes: 1 rank 1 slot, dual-die package 2 rank.

3. Includes: 2 rank 1 slot.

4. The JEDEC JESD79-4B standard for DDR4 SDRAM limits the maximum tCK to 1.6 ns. Because of this

limitation, Microsemi recommends working with your DRAM vendor to verify support for data rates at or

less than 1066 Mbps.

5. Byte-mode LPDDR4 devices are not supported.

6. Dual die package includes single die with ECC.

7. LPDDR4 support is only available as a 32-bit interface.

8. Refer to board design guidelines for trace matching requirements.

6.1.4

Gigabit Ethernet MAC

The following tables describe the Gigabit Ethernet MAC (GEM).

Table 29 • Serial-GMII Protocol Characteristics (Dedicated MSS SGMIO PHY)

Units

Max

Min

Line Rate (Mbps)

Parameter

0.25

1250

SGMII deterministic

transmitter jitter

0.25

1250

SGMII total receiver jit-

ter tolerance

Table 30 • GEM External Filter Clock

Units

Max

Min

Parameter

MHz

62.5

GEM external filter clock

Table 31 • MII Protocol (Interface to FPGA Fabric)

Units

Max

Min

Symbol

Parameter

5.0

TMIIDCK

Input setup to MII

clocks, all inputs

0.0

TMIICKD

Input hold to MII clocks,

all inputs

Microsemi Proprietary and Confidential. DS0147 Revision 1.0

AC Switching Characteristics

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