| 数据搜索系统,热门电子元器件搜索 |
|
MPFS250T 数据表(PDF) 63 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
MPFS250T 数据表(HTML) 63 Page - Microchip Technology |
|
63 / 128 page ![]() Forwarded Clock-to-D- ata Skew –1 (Mbps) STD (Mbps) –1 (MHz) STD (MHz) I/O Type Topology Interface N- ame Parameter From a HS_ IO_CLK 1000 800 500 400 GPIO Tx DDR digi- tal mode for MIPI TX_DDRX_ B_C_ MIPI Output FMA- X 4:1 clock source, cen- tered with PLL Table 69 • Programmable Delay Unit –1 Max –1 Typ –1 Min STD Max STD Typ STD Min Parameter ps 29.5 25 12.7 35 30 12.7 In delay, out delay, DLL delay step sizes Note: Refer to Libero timing reports for configuration specific intrinsic and incremental delays. Figure 3 • LVDS Jitter Tolerance Plot Table 70 • I/O CDR Switching Characteristics Jtolmin (UI) Max Tx to Rx Fre- quency Offset (ppm) Max Data Rate (M- bps) Min Data Rate (M- bps) I/O Configuration Buffer Type 0.08 ±200 1250 266 LVDS18 HSIO 1, 2 59 Microsemi Proprietary and Confidential. DS0147 Revision 1.0 AC Switching Characteristics |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |