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MPFS250T 数据表(PDF) 59 Page - Microchip Technology |
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MPFS250T 数据表(HTML) 59 Page - Microchip Technology |
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59 / 128 page  6.2.6 User I/O Switching Characteristics The following section describes user I/O switching characteristics. For more information about user I/O timing, see the PolarFire SoC I/O Timing Spreadsheet (to be released). The following interface names are described in UG0686: PolarFire FPGA User I/O User Guide. 6.2.6.1 I/O Digital The following tables describe I/O digital. Table 65 • I/O Digital Receive Single-Data Rate Switching Characteristics Clock-to-D- ata Condi- tion –1 (Mbps) STD (Mbps) –1 (MHz) STD (MHz) I/O Type Topology Interface N- ame Parameter From a global clock 500 500 500 500 HSIO, GPIO Rx SDR RX_SDR_G_ A Input FMAX source, aligned From a re- gional clock 250 250 250 250 HSIO, GPIO Rx SDR RX_SDR_R_ A Input FMAX source, aligned From a global clock 500 500 500 500 HSIO, GPIO Rx SDR RX_SDR_G_ C Input FMAX source, cen- tered From a re- gional clock 250 250 250 250 HSIO, GPIO Rx SDR RX_SDR_R_ C Input FMAX source, cen- tered Table 66 • I/O Digital Receive Double Data Rate Switching Characteristics Clock-to-D- ata Condi- tion –1 (Mbps) STD (Mbps) –1 (MHz) STD (MHz) I/O Type Topology Interface N- ame Parameter From a global clock 690 670 345 335 HSIO Rx DDR RX_DDR_G_ A Input FMAX 650 620 325 310 GPIO source, aligned From a re- gional clock 500 500 250 250 HSIO Rx DDR RX_DDR_R_ A Input FMAX 500 500 250 250 GPIO source, aligned From a global clock 690 670 345 335 HSIO Rx DDR RX_DDR_G_ C Input FMAX 650 620 325 310 GPIO source, cen- tered From a re- gional clock 500 500 250 250 HSIO Rx DDR RX_DDR_R_ C Input FMAX 500 500 250 250 GPIO 55 Microsemi Proprietary and Confidential. DS0147 Revision 1.0 AC Switching Characteristics |
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