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MPFS250T 数据表(PDF) 35 Page - Microchip Technology |
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MPFS250T 数据表(HTML) 35 Page - Microchip Technology |
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35 / 128 page  Table 34 • SD/SDIO Interface SDR104 Units Max Typ Min Symbol Parameter % 60 40 TDCSDHSCLK1 SD device clock du- ty cycle ns 3.2 1.0 TSDSDRCKO1 Clock to output de- lay, all outputs UI 0.5 TSDSDR1IVW Input valid data window MHz 200 FSDSDRCLK1 SDR104 mode de- vice clock frequen- cy Table 35 • SD/SDIO Interface SDR50/25 Units Max Typ Min Symbol Parameter % 60 40 TDCSDHSCLK2 SD device clock du- ty cycle ns 6.8 1.0 TSDSDRCKO2 Clock to output de- lay, all outputs UI 0.3 TSDSDR2IVW Input valid data window MHz 100 FSDSDRCLK2 SDR50 mode device clock frequency MHz 50 FSDSDRCLK2 SDR25 mode device clock frequency Table 36 • SD/SDIO Interface SDR12 Units Max Typ Min Symbol Parameter % 60 40 TDCSDHSCLK3 SD device clock du- ty cycle ns 36.8 1.0 TSDSDRCKO3 Clock to output de- lay, all outputs ns 10.0 TSDSDRDCK3 Input setup time, all inputs ns 1.5 TSDSDRCKD3 Input hold time, all inputs MHz 25 FSDSDRCLK3 SDR12 mode device clock frequency 31 Microsemi Proprietary and Confidential. DS0147 Revision 1.0 AC Switching Characteristics |
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